JieLi AC695N, AC696N Bluetooth Chip Hardware Design Specification - Circuit Design Guide (1)

Special Notes:

1. The input voltage on the VBAT power pin must not exceed 5.0V.
2. The voltage on the LDO_IN charging input pin must not exceed 5.5V.
3. A capacitor placement to ground must be reserved for LDO_IN.For speakers or headphones using the internal soft power-on/off solution, please use the PBI pin (low-level wake-up) for the power button.
4. To ensure product safety and reliability, please use batteries with protection circuits.
5. Test points must be provided for the programming pins (VBAT, USBDM, USBDP, VDDIO, VSSIO).

Note: The QFN package chip is small, which is not conducive to programming via test fixtures or manual methods. It is recommended to first mount the chip, then program it via PC.

1. Circuit Design Guide

1.1 Crystal Oscillator Selection Guide

Due to Bluetooth's high requirement for frequency offset, the quality of the crystal oscillator is crucial for Bluetooth performance. Consistency and stability of the crystal oscillator must be ensured during selection. The frequency deviation of the crystal oscillator must be ≤ ±10ppm, and a load capacitance (CL) of 12pF is recommended.

Recommended model:  If using crystal oscillators from other models, testing and verification are essential.

1.2 DCDC Selection and Circuit Description

① If the power consumption of the chip's internal LDO mode is acceptable for the application, the external DCDC can be omitted.

② DCDC chip selection: The switching frequency must be greater than 2M, output voltage 1.26V.

③ Use 1% precision resistors for DCDC feedback resistors R2 and R3.

Schematic is as follows: